Memories (e.g., memory devices) are typically provided as internal, semiconductor, integrated circuit devices in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory has developed into a popular source of non-volatile memory for a wide range of electronic applications. Flash memory typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption. Changes in threshold voltage (Vt) of the memory cells, through programming (which is often referred to as writing) of charge storage structures (e.g., floating gates or charge traps) or other physical phenomena (e.g., phase change or polarization), determine the data state (e.g., data value) of each memory cell. Common uses for flash memory and other non-volatile memory include personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, mobile telephones, and removable memory modules, and the uses for non-volatile memory continue to expand.
A NAND flash memory is a common type of flash memory device, so called for the logical form in which the basic memory cell configuration is arranged. Typically, the array of memory cells for NAND flash memory is arranged such that the control gate of each memory cell of a row of the array is connected together to form an access line, such as a word line. Columns of the array include strings (often termed NAND strings) of memory cells connected together in series between a pair of select gates, e.g., a source select transistor and a drain select transistor. Each source select transistor may be connected to a source, while each drain select transistor may be connected to a data line, such as column bit line. Variations using more than one select gate between a string of memory cells and the source, and/or between the string of memory cells and the data line, are known.
Although it is common to read data from a memory in parallel from a number of memory cells, this data is often output serially along a number of parallel data output (DQ) lines. As an example, a read operation of a memory might return 16 KB of data values, and these data values might be output from the memory sequentially, or serially, over 16 or 8 DQ lines. For example, a data value for a particular digit (e.g., bit) position of a first data word (e.g., a 16- or 8-bit data word) might be provided to a particular DQ line aligned with a first transition (e.g., rise or fall) of a clock signal, a data value for the particular digit position of a second data word might be provided to the particular DQ line aligned with a second transition of a clock signal, a data value for the particular digit position of a third data word might be provided to the particular DQ line aligned with a third transition of a clock signal, etc. Data values for each additional digit position of each of the data words might be provided to remaining DQ lines aligned with the same transitions of the clock signal. Although output of data might be aligned with transitions of a single clock signal, several clock signals generated from that single clock signal might be used in effecting the serialization of the read data. As data output rates increase, timing of such serialization of data output may become more critical.